Lecture

No RISC, No Reward: Unlocking Extreme Efficiency in Physical AI with RISC-V

  • at -
  • Hall C6C6.501
  • Language: English
  • Type: Lecture

Lecture description

Deployment of neural networks at the edge is often constrained by the rigidity and integration cost of domain-specific accelerators. In this talk, Mayank will address the “efficiency wall”: when an accelerator optimized for one architecture (e.g., CNNs) runs another (e.g., transformers), TOPS don’t translate into throughput. Leveraging the extensible RISC-V ISA, he will present a holistic hardware-software co-design that enhances a standard RISC-V CPU with extensions optimized for CNN and vision transformer operations—avoiding a separate accelerator and its integration overhead. Custom instructions provide fine-grained data path control, cutting data movement and power consumption. He will share results showing greater energy efficiency in physical AI applications. Complementing the hardware, an ISA-aware software ecosystem streamlines moving models from PyTorch/TensorFlow to optimized implementations without manual kernel tuning, decoupling model definition from hardware specifics and enabling AI in use cases from IoT to automotive.